verilog files in order by moving the files up or down (important to assign top level file). Now switch to co-simulation wizard and arrange your. Modelsim arrange files in order and assign top level file. The Quartus Prime Lite Edition Design Software, Version 20.1.1 supports the following device families:Īrria II, Cyclone 10 LP, Cyclone IV, Cyclone V, MAX II, MAX V, and MAX 10 FPGA. The problem could be solved if you prioritise your HDL f iles by moving up and down before compilation. If you would like to receive customer notifications by e-mail, please subscribe to our subscribe to our customer notification mailing list. The Quartus Prime Lite Edition Design Software, Version 20.1.1 is subject to removal from the web when support for all devices in this release are available in a newer version, or all devices supported by this version are obsolete. For critical support requests, please contact our support team. If you must use this version of software, follow the technical recommendations to help improve security. This version does not include the latest functional and security updates.
Users should upgrade to the latest version of the Quartus Prime Design Software. A newer version of the Quartus Prime Design Software is available.
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